This five-part tutorial series helps you understand the Cell Broadband Engine (Cell BE) architecture and gives you a basic intuition for programming issues on it, insight into the compiler challenges presented by it, and an understanding of the techniques and solutions proposed by the IBM compiler.

In Part 1, meet the Cell BE processor from a compiler-writer's perspective, and get a bird's-eye view of a number of the unique challenges it poses. Part 1 provides useful background information relevant to the other tutorials in the series.

Second in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses specific issues in optimizing code to run effectively on the Synergistic Processor Elements (SPEs) in the Cell Broadband Engine (Cell BE) processor.

Third in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses the compiler issues in optimizing code to run efficiently on SIMD-capable processors. In particular, it shows how to optimize code that must run both on the VMX SIMD engine of the PowerPC core of the Cell Broadband Engine (Cell BE) processor, and also on the SIMD-only Synergistic Processor Elements (SPEs).

This tutorial, fourth and penultimate in the "An introduction to compiling for the Cell Broadband Engine architecture" series, discusses ways to partition code to run across the multiple cores available in a Cell Broadband Engine (Cell BE) processor. It gives particular attention to efficient partitioning of code to allow larger programs or data sets to be manipulated using the 256KB of local store available on the Synergistic Processor Elements (SPEs).

Fifth and last in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses techniques for managing data in the local store of the Synergistic Processor Elements (SPEs) of a Cell Broadband Engine (Cell BE) processor. Learn particular techniques such as double-buffering and maintaining a reasonably efficient software cache.